Design of Low Power Integrated Circuits.

Authors

  • Luoyi Wang Author

DOI:

https://doi.org/10.61173/agd0cr27

Keywords:

Low Power Design, Power Optimization, Finfet, Dynamic Voltage Scaling (DVFS)

Abstract

The rapid development of integrated circuit technology has made the design of low-power circuits a major concern in this field. Power consumption limits the prolonged operation of high-performance computer systems, affects system performance and heat dissipation, and shortens the operating lifespan of portable devices. The fundamental causes of power consumption, including static, shortcircuit, and dynamic power consumption, are thoroughly examined in this work, which focuses on the design of low-power digital integrated circuits. Power and voltage designs, DVFS (dynamic voltage and frequency scaling), and closed-loop clocking are some of the tactics for implementing low-power technologies that are also discussed. In addition, new ultra-low power designs such as field-effect transistors (FETs), semiconductor organic integrated circuits (SOIs), and tunneling field effect transistors (TFETs) are shown, and their usefulness is shown by way of an example of a Bluetooth 5.0 systemon-chip (SoC) application. Future developments in lowpower design will guarantee ongoing innovation in highperformance electronic systems by optimizing device layouts and making use of new materials.

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Published

2024-11-12

Issue

Section

Articles